The present invention relates to a semiconductor device, and in particular to a semiconductor device using a conductor film made of copper as a main component, that is, a main wiring material of a buried wiring.
These years, due to high dense integration of LSIs, and microminiaturization of transistors for the purpose of high speed operation, a signal delay in wiring has become not negligible, and accordingly, a decrease in wiring resistance and a decrease in interwiring capacitance have been eagerly desired. Thus, there has been being developed a copper wiring technology utilizing copper (Cu), as a wiring material, which has a resistance lower than that of conventionally used aluminum alloys and which is excellent in migration resistance. Further, in order to decrease the interwiring capacitance, it has been considered to use a low dielectric constant insulation film as an interlayer insulation film material.
These copper wiring structures are formed in a buried wiring technology which is, for example, as follows: wiring apertures such as wiring channels or holes are formed in an insulation film, and thereafter, a conductive barrier and a conductive film made of copper as a main component are deposited and laminated on the insulation film including the insides of the wiring apertures in the mentioned order as viewed from the bottom side. Then, with the use of a chemomechanical polishing process or the like, extra conductive film and conductive barrier film are polished off so as to obtain buried wirings within the wiring apertures. Thereafter, after cleaning, a diffusion preventing insulation film such as a silicon nitride film is formed on the upper surfaces of the insulation film and the buried wirings, and then, a low dielectric constant film is deposited on the upper surface of the diffusion preventing insulation film.
However, in the progress of the development of the copper wiring structures, it has been found that this structure is unexpectedly poor in migration resistance, that is, there would be a risk of formation of voids in a copper wiring or a via due to stress migration. Accordingly, the following technology has been disclosed:
JP-A-2003-303880 discloses a technology in which an interlayer insulation film has a laminated structure in order to reduce a stress in a connection zone between an upper wiring layer and a via (a technology of preventing occurrence of stress migration in a via), and further, JP-A-2003-257979 discloses a technology in which impurity atoms are added in copper for wiring (a technology for preventing stress migration in a copper wiring).
However, in a semiconductor device having the above-mentioned copper wiring structure, a wiring in the lower part of a via hole, which connects among the wirings, causes a problem of occurrence of an inferior stress migration therein. This problem is noticeable if the via hole has a small diameter, that is, voids occurs in a wiring part around the lower part of the via hole, and accordingly, the wiring resistance becomes larger, resulting in occurrence of a risk of wire-breakage.